Serial Bus Design for MPC860 Processor under VxWorks with Modern Comparison

Serial Bus Design for MPC860 Processor under VxWorks with Modern Comparison

This article presents a detailed serial bus design for the MPC860 (PowerPC860) processor under VxWorks, including native SCC/SMC channels, multi-port expansion using the TI 16C554 UART, and a robust hardware watchdog solution. A comparison with modern Power Architecture designs (QorIQ) is included to highlight evolution in embedded serial communication systems.

🛠 MPC860 Communication Capabilities

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The MPC860 integrates a Communication Processor Module (CPM) with:

• 2 SMC channels — supporting UART, SPI, I2C
• 4 SCC channels — high-performance UART/HDLC/Ethernet support
• Built-in Baud Rate Generators
• Dual-Port RAM (DPRAM) for buffer management
• CPM-driven interrupt handling

These features enable scalable and flexible serial communication for aerospace, industrial, and telecom applications.

⚡ Watchdog Circuit Design for Boot Monitoring

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The MPC860 boot under VxWorks typically takes ~4 seconds, exceeding the 1.6s default of common watchdogs like MAX691. A crystal-derived hardware solution ensures reliable monitoring:

• Crystal oscillator generates base clock
• Frequency divider produces ~6s period square wave
• High phase outputs crystal clock to WDI
• Low phase outputs SCC activity signal to WDI
• Watchdog triggers system reset via PRORESET if activity ceases

Programmable Logic Implementation (Verilog):

module DIV_FREQ (
    input 5MHZ,
    output reg SWITCH_NODE
);

always @(posedge 5MHZ) begin
    // Frequency division logic to create ~6s period
end

always @(SWITCH_NODE) begin
    if (SWITCH_NODE == 1'b1)
        WDI <= 5MHZ;           // Crystal clock during high phase
    else
        WDI <= SCC_ENABLE;     // SCC activity signal during low phase
end
endmodule

This approach provides long-term stability without CPU intervention.

🔧 Native SCC/SMC Software Design in VxWorks

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VxWorks BSP and SIO framework provide structured support for MPC860 serial channels.

Key Data Structure: PPC860SCC_CHAN

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typedef struct ppc860Scc_chan {
    SIO_DRV_FUNCS *pDrvFuncs;
    void *getTxArg;
    void *putRcvArg;
    VINT16 int_vec;
    VINT16 channelMode;
    int baudRate;
    int clockRate;
    int bgrNum;
    SCC_UART_DEV uart;
} PPC860SCC_CHAN;

SCC3 Hardware Initialization Example

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void SerialScc3HwInit(void) {
    PPC860SCC_CHAN ppc860SccChan;
    ppc860SccChan.clockRate = 40000000;   // 40 MHz
    ppc860SccChan.bgrNum = 3;             // BRG3

    ppc860SccChan.uart.txBufBase = (UINT8*)(MPC860_DPRAM_BASE + TX_BUFFER_SCC3);
    ppc860SccChan.uart.rxBufBase = (UINT8*)(MPC860_DPRAM_BASE + RX_BUFFER_SCC3);

    ppc860SccChan.uart.pSccReg = (SCC_REG*)MPC860_GSMR_L3(...);
    
    ppc860SccDevInit(&ppc860SccChan);
    intConnect(INT_VEC_SCC3, (VOIDFUNCPTR)ppc860SccInt, (int)&ppc860SccChan);

    sprintf(devName, "%s%d", "/yCo/", 3);
    ttyDevCreate(devName, (SIO_CHAN*)&ppc860SccChan, 512, 512);
}

⚙ Multi-Port Expansion with TI 16C554

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For systems needing more than six serial ports, the TI 16C554 quad UART is used:

• Connected via MPC860 lower data bus (little-endian)
• CS5 as base chip select, address lines A25/A26 for channel decoding
• Interrupts INTA-INTD mapped to IRQ4-IRQ7

Example Initialization (Channel A):

#define 16554A_BASE_ADDR   CS5_BASE_ADDRESS + 0x00

void SerialPort_initA(void) {
    UCHAR *addr = (UCHAR*)16554A_BASE_ADDR;
    *(addr + 3) = 0x0B;   // 8N1, odd parity
    *(addr + 2) = 0x87;   // FIFO enable
    *(addr + 3) = 0x8B;   // Baudrate 38400
    intEnable(4);          // Enable IRQ4
}

Other channels follow similar configuration with offset addresses.

📈 Modern Comparison: QorIQ and Advanced Power Architecture

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Modern Power Architecture processors (e.g., NXP QorIQ) provide:

• Integrated multi-UART modules supporting higher speeds and more channels
• Flexible interrupt routing and DMA-based serial transfers
• Native PCIe and Ethernet connectivity reducing reliance on discrete UART expansion
• Hardware watchdogs integrated in SoC for robust boot monitoring
• Software frameworks (Linux RT, VxWorks, or QNX) for rapid serial port configuration

Key Advantages over MPC860 Design:

This evolution reduces board complexity, improves reliability, and supports higher throughput.

✅ Conclusion

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The MPC860 provides a solid foundation for multi-channel serial communication under VxWorks, enhanced by TI 16C554 expansion and robust hardware watchdogs. Modern Power Architecture platforms like QorIQ integrate many of these functions on-chip, simplifying design while maintaining reliability and scalability in industrial and aerospace embedded systems.

Design principles from MPC860 remain relevant for engineers handling legacy systems or designing robust serial communication frameworks.