S3C2440 VxWorks NAND Boot Using Stepping Stone SRAM
For embedded systems with strict cost and size constraints, removing NOR flash from the boot design can significantly simplify hardware. This guide explains how to boot VxWorks directly from NAND flash on the S3C2440 ARM9 processor by leveraging its built-in 4KB stepping stone SRAM.
This approach enables a reliable, production-ready boot process while reducing BOM cost and board complexity.
π Why NAND-Only Boot Matters #
Traditional embedded designs often use:
- NOR flash for execute-in-place (XIP)
- NAND flash for storage
However, NOR flash introduces several drawbacks:
- Higher cost per bit
- Lower storage density
- Slower write/erase performance
Key Advantage of S3C2440 #
The S3C2440 includes a 4KB internal SRAM (stepping stone) that:
- Automatically loads the first 4KB from NAND on power-up
- Begins execution directly from SRAM
This enables a pure NAND boot architecture, eliminating the need for NOR flash entirely.
π§± Hardware Platform Overview #
Typical system configuration:
- CPU: S3C2440 (ARM9)
- NAND Flash: K9F2G08U0B
- SDRAM: K4S561632N
- Ethernet: DM9000
βοΈ VxWorks Boot Process Overview #
VxWorks startup consists of multiple stages:
Stage 1: Low-Level Initialization #
-
romInit()
- Disable interrupts
- Initialize stack and CPU registers
-
romStart()
- Copy code/data to RAM
- Decompress image if required
Stage 2: System Initialization #
-
usrInit()
- Initialize cache and hardware
- Call kernel initialization
-
usrRoot()
- Create system tasks
- Parse boot parameters
- Start image loading
Stage 3: Kernel Startup #
-
bootCmdLoop
- Load VxWorks image
-
_sysInit
- Transfer control to kernel
π NAND Boot Implementation Strategy #
The key modification is inserting a NAND-to-RAM copy routine early in the boot process.
Design Constraints #
- Must fit within 4KB stepping stone SRAM
- Must execute before standard
romStart()logic - Must reliably copy boot image into SDRAM
π§ Step 1: Implement NAND Copy Function #
Define the NAND read interface:
void Nand2SRAM(unsigned char *to, unsigned long start_addr, int size);
Example Implementation #
for (i = (start_addr >> 11); size > 0; ) {
NF_CE_L(); NF_CLEAR_RB();
NF_CMD(CMD_RESET); NF_DETECT_RB(); NF_CE_H();
NF_nFCE_L(); NF_CLEAR_RB();
NF_CMD(CMD_READ1);
NF_ADDR(0x00); NF_ADDR(0x00);
NF_ADDR((i) & 0xff);
NF_ADDR((i >> 8) & 0xff);
NF_ADDR((i >> 16) & 0xff);
NF_CMD(CMD_READ2);
NF_DETECT_RB();
for (j = 0; j < 2048; j++) {
to[j] = NF_RDDATA8();
}
NF_nFCE_H();
size -= 2048;
to += 2048;
i++;
}
This routine reads NAND pages and copies them into SDRAM.
π§© Step 2: Integrate into Build System #
Add the NAND module:
BOOT_EXTRA = nand.o
Ensure early linking so it resides in the first 4KB:
bootrom : depend.$(BSP_NAME) bootInit.o romInit.o bootrom.Z.o ...
$(LD) ... romInit.o $(BOOT_EXTRA) bootInit.o ...
π Step 3: Memory Configuration #
Use standard BSP memory definitions:
ROM_TEXT_ADRSROM_LOW_ADRSRAM_HIGH_ADRS
No major changes are required, as the boot flow remains compatible with existing layouts.
π§ͺ System Verification #
Deployment Steps #
- Build bootrom using Tornado
- Flash bootrom into NAND via JTAG
- Set hardware to NAND boot mode
- Power on system
Runtime Behavior #
- First 4KB loads into stepping stone SRAM
- NAND copy routine loads remaining image into SDRAM
- Bootloader initializes system
Network Boot Test #
Configure bootline via serial console:
- Target IP
- Host IP
- Image path
Execute:
@
The system downloads the VxWorks image via Ethernet and starts successfully.
π Key Benefits #
| Feature | Benefit |
|---|---|
| No NOR flash | Reduced cost and board complexity |
| Reliable boot | Hardware-assisted SRAM loading |
| Flexible design | Works with standard VxWorks flow |
| Scalable | Adaptable to similar ARM9 platforms |
β Conclusion #
Using the stepping stone SRAM on S3C2440 enables a robust NAND-only boot solution for VxWorks. By placing a minimal NAND copy routine within the initial 4KB and controlling link order, the system can reliably load and execute the full boot image from NAND.
This design removes the need for NOR flash, simplifies hardware, and maintains full compatibility with VxWorks BSP workflowsβmaking it ideal for cost-sensitive and high-volume embedded applications.